Lauterbach debugger

The TRACE32 debuggers allow you to test your embedded hardware and software by using the on-chip debug interface of the microcontroller.

- JTAG a on-chip debug interface

- Debug features

• Read/write access to CPU registers

• Read/write access to all memories

Prerequisite: The system permits debugger access.

• Start/stop of program execution

Debug features specific for each microcontroller:

• Number of on-chip breakpoints

• Read/write access to memory while the program execution is running

• Additional features as benchmark counters, triggers etc.

- Two types of breakpoints

-- Set a software breakpoint - before resuming the CPU, the debugger replaces the instruction at the breakpoint address with a breakpoint code instruction.

- SW breakpoints can only be placed in RAM because they rely on modifying target memory.

- no restriction in the number of software breakpoints. But it must be considered, that by the usage of software breakpoint flash memory will be change, if program is run in flash memory.

When debugging code where instructions are copied (Scatterloading), modified or the processor MMU remaps areas of memory, HW breakpoints should be used. In these scenarios SW breakpoints are unreliable as they may be either lost or overwritten.

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On-chip breakpoints - resources to set the breakpoints are provided by the CPU.

- To set breakpoints on code in read-only memory - only the on-chip instruction address breakpoints are available.

With the command MAP.BOnchip it is possible to declare memory address ranges for use with on-chip breakpoints to the debugger.

ex - Break.Set 0xfcf00 /Program ; Software breakpoint 1

- Break.Set 0x100 /Program ; On-chip breakpoint

- SYStem.CPU ; select processor type

Total amount of available on-chip breakpoints.

• Instruction breakpoints: Number of on-chip breakpoints that can be used to set program

breakpoints into ROM/FLASH/EPROM. (for cortext a9 - six(6) instruction)

• Read/Write breakpoints: Number of on-chip breakpoints that can be used as Read or Write

breakpoints. (4 read/write)

• Data breakpoint: Number of on-chip data breakpoints that can be used to stop the program

when a specific data value is written to an address or when a specific data value is read from an

address(No)

- For the ARM architecture the on-chip breakpoints are provided by the “ICEbreaker” unit. on-chip breakpoints are usually  needed for instructions in FLASH/ROM.

The number of on-chip breakpoints for data accesses can be extended by using the ETM Address and Data comparators.