arm core

ARM Core

- The ARM1136JF-S processor is built around the ARM11 core in an ARMv6 implementation that runs the 32-bit ARM, 16-bit Thumb, and 8-bit Jazelle instruction sets.

- The processor contains EmbeddedICE-RT logic and a JTAG debug interface to enable hardware debuggers to communicate with the processor.

- The core is described in more detail in the following sections:

Instruction set categories

The instruction sets are divided into four categories:

• data processing instructions
• load and store instructions
• branch instructions
• coprocessor instructions.

Note

Only load, store, and swap instructions can access data from memory.

Conditional execution

All ARM instructions are conditionally executed and can optionally update the four condition code flags, Negative, Zero, Carry, and Overflow, according to their result.

Registers

The ARM1136JF-S core contains:

• 31 general-purpose 32-bit registers
• seven dedicated 32-bit registers.

Note

At any one time, 16 registers are visible. The remainder are banked registers used to speed up exception processing.

Modes and exceptions

- seven operating modes, five of which are exception modes:

• User mode
• Supervisor mode

- Exception

• fast interrupt
• normal interrupt
• memory aborts
• software interrupts
• Undefined instruction.

Thumb instruction set

Thumb is an extension to the ARM architecture. It contains a subset of the most commonly-used 32-bit ARM instructions that has been encoded into 16-bit wide opcodes, to reduce memory requirements.

DSP instructions

The ARM DSP instruction set extensions provide the following:

• 16-bit data operations
• saturating arithmetic
• MAC operations.

Multiply instructions are processed using a single-cycle 32x16 implementation. There are 32x32, 32x16, and 16x16 multiply instructions (MAC).

Media extensions

The ARMv6 instruction set provides media instructions to complement the DSP instructions. The media instructions are divided into the following main groups:

• Additional multiplication instructions for handling 16-bit and 32-bit data, including dual-multiplication instructions that operate on both 16-bit halves of their source registers.
• This group includes an instruction that improves the performance and size of code for multiword unsigned multiplications.
• Instructions to perform Single Instruction Multiple Data (SIMD) operations on pairs of 16-bit values held in a single register, or on quadruplets of 8-bit values held in a single register. The main operations supplied are addition and subtraction, selection, pack, and saturation.
• Instructions to extract bytes and halfwords from registers and zero-extend or sign-extend them. These include a parallel extraction of two bytes followed by extension of each byte to a halfword.
• Instructions to perform the unsigned Sum-of-Absolute-Differences (SAD) operation. This is used in MPEG motion estimation.

Datapath

The datapath consists of three pipelines:

• ALU/shift pipe - executes most of the ALU operations, and includes a 32-bit barrel shifter. Three pipeline stages:

- Shift - full barrel shifter. All shifts, including those required by the LSU, are performed

- The saturating left shift, which doubles the value of an operand and saturates it, is implemented in the Shift stage.

Lauterbach debugger

The TRACE32 debuggers allow you to test your embedded hardware and software by using the on-chip debug interface of the microcontroller.

- JTAG a on-chip debug interface

- Debug features

• Read/write access to CPU registers

• Read/write access to all memories

Prerequisite: The system permits debugger access.

• Start/stop of program execution

Debug features specific for each microcontroller:

• Number of on-chip breakpoints

• Read/write access to memory while the program execution is running

• Additional features as benchmark counters, triggers etc.

- Two types of breakpoints

-- Set a software breakpoint - before resuming the CPU, the debugger replaces the instruction at the breakpoint address with a breakpoint code instruction.

- SW breakpoints can only be placed in RAM because they rely on modifying target memory.

- no restriction in the number of software breakpoints. But it must be considered, that by the usage of software breakpoint flash memory will be change, if program is run in flash memory.

When debugging code where instructions are copied (Scatterloading), modified or the processor MMU remaps areas of memory, HW breakpoints should be used. In these scenarios SW breakpoints are unreliable as they may be either lost or overwritten.

---

On-chip breakpoints - resources to set the breakpoints are provided by the CPU.

- To set breakpoints on code in read-only memory - only the on-chip instruction address breakpoints are available.

With the command MAP.BOnchip it is possible to declare memory address ranges for use with on-chip breakpoints to the debugger.

ex - Break.Set 0xfcf00 /Program ; Software breakpoint 1

- Break.Set 0x100 /Program ; On-chip breakpoint

- SYStem.CPU ; select processor type

Total amount of available on-chip breakpoints.

• Instruction breakpoints: Number of on-chip breakpoints that can be used to set program

breakpoints into ROM/FLASH/EPROM. (for cortext a9 - six(6) instruction)

• Read/Write breakpoints: Number of on-chip breakpoints that can be used as Read or Write

breakpoints. (4 read/write)

• Data breakpoint: Number of on-chip data breakpoints that can be used to stop the program

when a specific data value is written to an address or when a specific data value is read from an

address(No)

- For the ARM architecture the on-chip breakpoints are provided by the “ICEbreaker” unit. on-chip breakpoints are usually  needed for instructions in FLASH/ROM.

The number of on-chip breakpoints for data accesses can be extended by using the ETM Address and Data comparators.

ARM

Exception vectors:

Reset - 0x00

Undefined instruction - 0x04

Software interrupt - 0x08

Prefetch Abort - 0x0c

Data Abort - 0x10

Reserved - 0x14

IRQ - 0x18

FIQ - 0x1c

SPSR

-- to store the current value of the CPSR when an exception is taken so that it can be restored after handling the exception.

- Each exception handling mode can access its own SPSR.

- User mode and System mode do not have an SPSR because they are not exception handling modes.

CPSR holds:

- the APSR flags

- the current processor mode

- interrupt disable flags

- current processor state (ARM, Thumb, ThumbEE, or Jazelle®)

- endianness state (on ARMv4T and later)

- execution state bits for the IT block (on ARMv6T2 and later).

TLB structure

- used for both data accesses and instruction fetches.

-- two parts:

-- an eight-entry fully-associative part used exclusively for holding lockdown TLB entries

-- a set-associative part for all other entries, 2 way x 32 entry.

- which part an instruction is determined by state of the TLB lockdown register

- micro TLB of 32 entries - implemented on each of the instruction and data sides.

The main TLB is the second layer in the TLB structure that catches the misses from the Micro TLBs.

Each TLB entry contains a virtual address, a page size, a physical address, and a set of memory properties.

* Block sizes:

- Supersections - Describe 16MB blocks of memory.

- Sections 1MB

- Large pages - 64KB

- Small pages -4KB

* Supersections, sections and large pages are supported to permit mapping of a large region of memory while using only a single entry in a TLB.

* If no mapping for an address is found within the TLB, then the translation table is automatically read by hardware and a mapping is placed in the TLB.

Making ASCII File to Unicode File in Windows

Problem Statement

How to create a unicode file? Many a time we want to insert unicode i.e. Chinese character in file but if file is ASCII, you can not open it successfully. So insert unicode character into a file, you will be required to have unicode file.

Solution

Insert two character as first two bytes i.e. 0xEE and 0xEF. It mean these two bytes should be at the beginning.

Calculate Size of a folder in Windows

Problem Statement

Many a times, we wish to monitor space left in disk then only allow to get log generated in disk. If it exceeded there should be a alarm raised regarding memory crunch.

Solution

The solution can be used for other purposes as well.

GetFolderSize(Provide the path)

{

     Call FindFirstFile to get handle

     {

         While(True)

         {   

            Check if it is not directory (.(current directory), ..(previous directory))

            Check if it is a directory

            If YES

            {

                   Call GetFolderSize recursively

            }

            else

            {

                   Keep account of file size

            }

            If FindNextFile successful

            {

                   Continue

            }

            Else

            {

                   Close Handle and break

            }

         }

     }

}

CAN understanding

- CAN averts message/data collisions by using the message ID of the node, i.e. the message with the highest priority (= lowest message ID) will gain access to the bus, while all other nodes (with lower priority message IDs) switch to a “listening” mode.
- At a baud rate of 1 MBit/sec this would translate into 12 microseconds of actual bus arbitration
- bit stuffing - In CAN frames, a bit of opposite polarity is inserted after five consecutive bits of the same polarity. This practice is called bit stuffing, and is due to the non-return to zero (NRZ) coding adopted. The stuffed data frames are destuffed by the receiver.
- Since bit stuffing is used, six consecutive bits of the same type (111111 or 000000) are considered an error.
- Bit stuffing implies that sent data frames could be larger than one would expect by simply enumerating the bits shown in the tables above.
- PeliCAN mode the complete CAN 2.0B functionality is supported (29-bit
identifier).

Deleting oldest file in a folder

Problem statement

Many a times we want to have automatic cleaning mechanism for oldest file to create more space for new files. It is very useful when we no longer require old files.

Solution

DeleteOldestFile(provide the path)

{

     Call FindFirstFile

     If Success

     {

            Check if it is not directory else skip

            Compare timing of files

            Swap files to local variable keeping point of oldest file if local variable timing is newer then current file timing

            Call FindFileNext

            If not success, close handle and break

            

     }

}